Metrum Pavane NOS DAC

As great leaps have been made with I/V stages (away from the norm) and this dac doesn't allow this.
As it would have standard text book I/V embedded within the dac itself which looks to be A1 on the data sheet, but with high output impedance.

George, note that A1 is configured as a unity gain buffer, not as an I/V converter, and that it is not even in the path to Vout. Its purpose, as shown on pages 24 and 25 (pdf pages 25 and 26) of the datasheet, is to support a number of different configurations of the external buffer or other amplifier that would be driven by Vout.

Regards,
-- Al

So are you saying Al that this dac is a real R2R Ladder Multibit dac, that can output volts even though it's high impedance (rather than being current output) with no I/V stage involved?

Cheers George

Yes, that appears to be the case as far as I can tell from the datasheet, George. With the slight qualification that while the D/A conversion is accomplished by a resistor ladder, strictly speaking it's not an R2R ladder (see page 19, pdf page 20, of the datasheet).

We'll see if Ric can obtain confirmation of that when he calls Analog Devices. But as he indicated, that interpretation is given added credibility by the fact that TotalDAC and MSB Technology, which use R2R ladder approaches (albeit with discrete resistors, and at vastly higher price points, and with at least several additional bits worth of performance), also do not require or incorporate I/V conversion.

Regards,
-- Al

I think I see now, this may have been done before on other dac chips, I think with those who understand it, say it's a hybrid? Part low res R2R ladder Multibit, part Delta Sigma? Would this dac then do you think be tarred with the same brush?
If this is the case "those that say it's a hybrid" say it's still not as good as real R2R Ladder Multibit? But it's easier/cheaper to manufacture than true R2R Multibit.

Cheers George

Hi George,

Yes, per the description I referred to in the datasheet, it is what is referred to as a hybrid D/A converter. But without any part of it being delta sigma, however. As defined in this Wikipedia writeup, it uses a segmented architecture, combining "thermometer coding" for the most significant 6 bits, and R2R architecture for the other 14 bits. So as I indicated, the structure as a whole can be considered to be a multibit ladder, but not an R2R ladder.

Regarding your question, I have no particular quantitative feel for how that all may trade off performance-wise against other approaches providing similar resolution and speed. Maximum speed, btw, looks like it is not much faster than redbook, as the digital data is described as being clocked into a 24 bit register serially at 35 MHz max (indicated as 50 MHz max in one place, perhaps incorrectly).

Regards,
-- Al